D3D11_GRAPHICS_MEMORY_ACCESS_FLAG Enumeration

Flags to control whether memory is CPU-cached and whether memory is coherent between the CPU and GPU.

Syntax

typedef enum D3D11_GRAPHICS_MEMORY_ACCESS_FLAG
{
    D3D11_GRAPHICS_MEMORY_ACCESS_CPU_CACHE_COHERENT = 0,
    D3D11_GRAPHICS_MEMORY_ACCESS_CPU_WRITECOMBINE_NONCOHERENT = 1,
    D3D11_GRAPHICS_MEMORY_ACCESS_CPU_CACHE_NONCOHERENT_GPU_READONLY = 2
} D3D11_GRAPHICS_MEMORY_ACCESS_FLAG;

Constants

Constant	Description
D3D11_GRAPHICS_MEMORY_ACCESS_CPU_CACHE_COHERENT	Memory is CPU-cached and is coherent between the CPU and GPU. Memory is cached by both the CPU and the GPU. GPU reads and writes will snoop CPU caches, but CPU reads and writes will not snoop GPU caches. GPU memory access is I/O coherent, and will always uses the ONION bus.GPU reads and writes to coherent memory run at half and quarter rate, respectively. If memory is written by the GPU, the appropriate range in the GPU caches must be flushed by the title before reading on the CPU. If memory is written by the CPU, the appropriate range in the GPU caches must be flushed by the title before reading on the GPU.
D3D11_GRAPHICS_MEMORY_ACCESS_CPU_WRITECOMBINE_NONCOHERENT	Memory is CPU write-combined and is not coherent between the CPU and GPU. Memory pages are cached by the GPU, but not by the CPU. GPU memory access is noncoherent, and can usually use the GARLIC bus. GPU reads and writes to non-coherent memory run at full rate. If memory is written by the CPU, the write combine buffers must be flushed (via a write memory barrier), and the appropriate range in the GPU caches must be flushed by the title before accessing on the GPU.
D3D11_GRAPHICS_MEMORY_ACCESS_CPU_CACHE_NONCOHERENT_GPU_READONLY	Memory is CPU-cached and is not coherent between the CPU and GPU. Memory is cached by both the CPU and the GPU. GPU memory access is noncoherent, and it can usually use the GARLIC bus. GPU reads to noncoherent memory run at full rate. GPU cannot write to this memory. If memory is written by the CPU, the appropriate ranges in both the CPU and GPU caches must be flushed by the title before reading on the GPU. Cached noncoherent memory is not recommended for scenarios involving GPU writes and CPU reads, because this is difficult to perform correctly.

Remarks

These flags are used by D3DAllocateGraphicsMemory.

The Xbox One GPU can access main memory using two different buses:

The graphics accelerated reduced latency integrated channel (GARLIC) bus is a four-channel bus capable of 68 GBps peak bandwidth (limited by the bandwidth of DRAM). Each of the four GARLIC channels is connected directly to one of the four DRAM controllers.
The on-chip northbridge to I/O noncoherent (ONION) bus is a two-channel bus capable of 24 GBps read or 15 GBps of peak write bandwidth, limited by components in the northbridge. The two ONION channels connect to the memory controller, which provides the ONION bus with some additional capabilities that GARLIC does not possess. Certain types of traffic must use the ONION bus.

Refer also to the white paper:

Xbox One GPU Memory Access: ONION, GARLIC, and More

Requirements

Header: Declared in d3d11_x.h (d3d11_1.h on other Windows platforms).

Library: Use d3d11_x.lib (d3d11.lib on other Windows platforms).

D3D11_GRAPHICS_MEMORY_ACCESS_FLAG Enumeration

Syntax

Constants

Remarks

Requirements

See also