D3Dcompiler Intrinsics

The following intrinsics have been added to the Xbox One D3Dcompiler. These intrinsics expand into new DXBC opcodes that only work on Xbox One.

Most of these intrinsics correspond to the instruction set by AMD, which you can find here.

• ALU (Arithmetic Logic Unit)
• 64-bit ALU
• Conversion
• Pack/unpack
• Scalar ALU
• Typed memory access intrinsics
• Execution context
• Cross lane
• Wave intrinsics
• Intrinsics for manual interpolation
• GDS/GWS intrinsics
• Special
• Alphabetical list of intrinsics

ALU (Arithmetic Logic Unit)

float __XB_Cos_F32(float a);

return (a >= -256.0f && a <= 256.0f) ? Cos(2.0f * Pi * a) : 0.0f;

float __XB_Cube_ID(
        float f1, 
        float f2, 
        float f3);

if (fabs(f3) >= fabs(f1) && 
        fabs(f3) >= fabs(f2)) return f3 < 0 ? 5 : 4;
if (fabs(f2) >= fabs(f1) return f2 < 0 ? 3 : 2;
return f1 < 0 ? 1 : 0;

float __XB_Cube_MA(
        float f1, 
        float f2, 
        float f3);

if (fabs(f3) >= fabs(f1) && fabs(f3) >= fabs(f2)) 
        return 2*f3;
if (fabs(f2) >= fabs(f1) return 2*f2;
return 2*f1;

float __XB_Cube_SC(
        float f1, 
        float f2, 
        float f3);

if (fabs(f3) >= fabs(f1) && fabs(f3) >= fabs(f2)) 
        return f3 < 0 ? –f1 : f1;
if (fabs(f2) >= fabs(f1)) return f1;
if (f1 < 0) return f3;
return –f3;

float __XB_Cube_TC(
        float f1,
        float f2,
        float f3);

if (fabs(f3) >= fabs(f1) && fabs(f3) >= fabs(f2)) 
        return –f2;
if (fabs(f2) >= fabs(f1)) 
        return f2 < 0 ? –f3 : f3;
return –f2;

float __XB_FMA_F32(
        in float mul1, 
        in float mul2, 
        in float add3);

__XB_Log_Clamp

float __XB_Max3_F32(
        in float f1,
        in float f2,
        in float f3);
int __XB_Max3_I32(
        in int i1,
        in int i2,
        in int i3);
uint __XB_Max3_U32(
        in uint u1,
        in uint u2,
        in uint u3);

float __XB_Med3_F32(
        in float f1, 
        in float f2,
        in float f3);

int __XB_Med3_I32(
        in int i1,
        in int i2,
        in int i3);

uint __XB_Med3_U32(
        in uint u1, 
        in uint u2, 
        in uint u3);

float __XB_Min3_F32(
        in float f1, 
        in float f2,
        in float f3);

int __XB_Min3_I32(
        in int i1,
        in int i2,
        in int i3);

uint __XB_Min3_U32(
        in uint u1,
        in uint u2,
        in uint u3);

int<1> __XB_MulI24(
        in int i1, 
        in int i2);

int<1> __XB_MulI24Hi(
        in int i1, 
        in int i2);

uint<1> __XB_MulU24(
        in uint u1, 
        in uint u2);

uint<1> __XB_MulU24Hi(
        in uint u1,
        in uint u2);

int<1> __XB_MadI24(
        in int i1,
        in int i2,
        in int i3);

uint<1> __XB_MadU24(
        in uint u1,
        in uint u2,
        in uint u3);

__XB_Rcp_Clamp

__XB_Rsq_Clamp

float __XB_Sin_F32(float a);

return (a >= -256.0f && a <= 256.0f) ? 
        Sin(2.0f * Pi * a) : 
        0.0f;

64-bit intrinsics represent 64-bit values as uint2. Note that for signed div or mod, if the denominator is 0 then the result is 0.

uint<2> __XB_AddI64(
              in uint<2> i1,
              in uint<2> i2);

uint<2> __XB_DivI64(
              in uint<2> i1,
              in uint<2> i2);

uint<2> __XB_DivU64(
              in uint<2> u1,
              in uint<2> u2);

uint<2> __XB_DToI64(
              in double<> d);

uint<2> __XB_DToU64(
              in double<> d);

double<> __XB_I64ToD(
              in uint<2> u1);

uint<2> __XB_MaxI64(
              in uint<2> i1,
              in uint<2> i2);

uint<2> __XB_MaxU64(
              in uint<2> u1,
              in uint<2> u2);

uint<2> __XB_MinI64(
              in uint<2> i1,
              in uint<2> i2);

uint<2> __XB_MinU64(
              in uint<2> u1,
              in uint<2> u2);

uint<2> __XB_ModI64(
              in uint<2> i1,
              in uint<2> i2);

uint<2> __XB_ModU64(
              in uint<2> u1,
              in uint<2> u2);

uint<2> __XB_MulI64(
              in uint<2> i1,
              in uint<2> i2);

uint<2> __XB_MulU64(
              in uint<2> u1,
              in uint<2> u2);

uint<2> __XB_NegI64(
              in uint<2> i1);

uint<2> __XB_ShlU64(
              in uint<2> u1,
              in uint u2);

uint<2> __XB_ShrI64(
              in uint<2> i1,
              in uint u2);

uint<2> __XB_ShrU64(
              in uint<2> u1,
              in uint u2);

uint<2> __XB_SubI64(
              in uint<2> i1,
              in uint<2> i2);

double<> __XB_U64ToD(
              in uint<2> u1);

Conversion

uint<> f32tof16nearest(
        in float_like<> x);

int<> __XB_F32ToI32FLR(
        in float<> val);

int<> __XB_F32ToI32RPI(
        in float<> val);

float<> __XB_I4ToF32(
        in int<> x);

Pack/unpack

uint<> __XB_BFI(
        in uint<> val, 
        in uint<> preserve,
        in uint<> enable);

uint<> __XB_BFM(
        in uint<> maskwidth,
        in uint<> maskloc);

int  __XB_IBFE(
        in uint width, 
        in uint offset, 
        in uint val);

uint<> __XB_PackF32ToSNORM16(
        in float<> f1, 
        in float<> f2);

double fClamp1 = (f1 > 1.0) ? 
        1.0 : 
        (f1 < -1.0 ? -1.0 : f1);
double fClamp2 = (f2 > 1.0) ? 
        1.0 : 
        (f2 < -1.0 ? -1.0 : f2);
double fNorm1 = (fClamp1 * (double)((1 << 15) - 1));
double fNorm2 = (fClamp2 * (double)((1 << 15) - 1));
int i1 = (short)((fNorm1 >= 0) ? 
        (fNorm1 + 0.5) : 
        (fNorm1 - 0.5));
int i2 = (short)((fNorm2 >= 0) ? 
        (fNorm2 + 0.5) : 
        (fNorm2 - 0.5));
u = ((unsigned)(i2 << 16)) 
        | (unsigned)(unsigned short)i1;

uint __XB_PackF32ToU8(
        float insertvalue,
        uint idx,
        uint uSrc);

unsigned uFieldIdx = u2 & 0x3;
unsigned uFieldBitLoc = uFieldIdx * 8;
unsigned uInData = u3 & ~(0xff << uFieldBitLoc);
unsigned char u8 = (unsigned char)f1;
unsigned u8Field = ((unsigned)u8) << uFieldBitLoc;

u = u8Field | uInData;

uint<> __XB_PackF32ToUNORM16(
        in float<> f1,
        in float<> f2);

double fClamp1 = (f1 > 1.0) ? 
        1.0 : 
        (f1 < 0 ? 0.0 : f1);
double fClamp2 = (f2 > 1.0) ? 
        1.0 : 
        (f2 < 0 ? 0.0 : f2);
double fNorm1 = (fClamp1 * (double)((1 << 16) - 1));
double fNorm2 = (fClamp2 * (double)((1 << 16) - 1));
unsigned u1 = (unsigned)(fNorm1 + 0.5);
unsigned u2 = (unsigned)(fNorm2 + 0.5);
u = ((u2 << 16)) | (unsigned short)u1;

uint<> __XB_PackI32ToI16(
        in int<> i1,
        in int<> i2);

u = (((unsigned)(short)i2) << 16) | 
        ((unsigned)(unsigned short)(short)i1);

uint<> __XB_PackU32ToU16(
        in uint<> u1,
        in uint<> u2);

u = (((unsigned)(unsigned short)u2) << 16) | 
        ((unsigned)(unsigned short)u1);

uint __XB_UBFE(
        in uint width, 
        in uint offset, 
        in uint val);

float<> __XB_UnpackByte0(
        in uint<> x);
float<> __XB_UnpackByte1(
        in uint<> x);
float<> __XB_UnpackByte2(
        in uint<> x);
float<> __XB_UnpackByte3(
        in uint<> x);

uint __XBOX_PackF32ToI16(
        float f1, 
        float f2)

uint __XBOX_PackF32ToU16(
        float f1, 
        float f2)

Scalar ALU

The following bit-count intrinsics correspond to native GPU scalar instructions. If a non-scalar value is provided to these intrinsics, the compiler will promote it to scalar using the v_readfirstlane_b32 instruction.

uint<1> __XB_S_BCNT0_U32(in uint<1> x);  // S_BCNT0_I32_B32;
uint<1> __XB_S_BCNT0_U64(in uint<2> x);  // S_BCNT0_I32_B64;
uint<1> __XB_S_BCNT1_U32(in uint<1> x);  // S_BCNT1_I32_B32;
uint<1> __XB_S_BCNT1_U64(in uint<2> x);  // S_BCNT1_I32_B64;
uint<1> __XB_S_BREV_U32(in uint<1> x);   // S_BREV_B32;
uint<1> __XB_S_BREV_U64(in uint<2> x);   // S_BREV_B64;
uint<1> __XB_S_BSET0_U32(in uint<1> x);  // S_BITSET0_B32;
uint<2> __XB_S_BSET0_U64(in uint<1> x);  // S_BITSET0_B64;
uint<1> __XB_S_BSET1_U32(in uint<1> x);  // S_BITSET1_B32;
uint<2> __XB_S_BSET1_U64(in uint<1> x);  // S_BITSET1_B64;
uint<1> __XB_S_FF0_U32(in uint<1> x);    // S_FF0_I32_B32;
uint<1> __XB_S_FF0_U64(in uint<2> x);    // S_FF0_I32_B64;
uint<1> __XB_S_FF1_U32(in uint<1> x);    // S_FF1_I32_B32;
uint<1> __XB_S_FF1_U64(in uint<2> x);    // S_FF1_I32_B64;
uint<1> __XB_S_FFO_U32(in uint<1> x);    // S_FLBIT_I32_B32;
uint<1> __XB_S_FFO_U64(in uint<2> x);    // S_FLBIT_I32_B64;
uint<1> __XB_S_FOSB_U32(in uint<1> x);   // S_FLBIT_I32;
uint<1> __XB_S_FOSB_U64(in uint<2> x);   // S_FLBIT_I32_I64;  

Typed memory access intrinsics

HLSL buffers are typically accessed via descriptors which describe the type and layout of the buffer memory to the hardware. The typed access intrinsics impose a format and layout conversion onto the memory access, bypassing the format and layout specified by the descriptor.

There are four types of buffer that support typed access: Buffer, RWBuffer, ByteAddressBuffer, and RWByteAddressBuffer. Of these four buffer types, only RWByteAddressBuffer currently supports the TypedStore intrinsics.

TypeMask

Typemask is an immediate scalar which specifies the data and numeric format to be imposed on the memory access.

The low 4 bits of scalar control data format, the next 3 bits control numeric format. The formats follow the CI GPU hardware convention.

The following define could be used to construct the type mask:

#define TYPEMASK(__NUMERIC, __DATA) (((__NUMERIC & 0x7) << 4) | (__DATA & 0xf))  

Buffer Intrinsic

type Buffer.XB_TypedLoad(in int<1> x, in int<1> typemask);

RWBuffer Intrinsic

type RWBuffer.XB_TypedLoad(in int<1> x, in int<1> typemask);

ByteAddressBuffer Intrinsic

uint ByteAddressBuffer.XB_TypedLoad(in uint<1> byteOffset, in uint<1> typemask);

uint<2> ByteAddressBuffer.XB_TypedLoad2(in uint<1> byteOffset, in uint<1> typemask);

uint<3> ByteAddressBuffer.XB_TypedLoad3(in uint<1> byteOffset, in uint<1> typemask);

uint<4> ByteAddressBuffer.XB_TypedLoad4(in uint<1> byteOffset, in uint<1> typemask);

RWByteAddressBuffer Intrinsic

uint RWByteAddressBuffer.XB_TypedLoad(
        in uint<1> byteOffset,
        in uint<1> typemask);

uint<2> RWByteAddressBuffer.XB_TypedLoad2(
        in uint<1> byteOffset,
        in uint<1> typemask);

uint<3> RWByteAddressBuffer.XB_TypedLoad3(
        in uint<1> byteOffset,
        in uint<1> typemask);

uint<4> RWByteAddressBuffer.XB_TypedLoad4(
        in uint<1> byteOffset,
        in uint<1> typemask);

void RWByteAddressBuffer.XB_TypedStore(
        in uint<1> byteOffset, 
        in uint<1> value,
        in uint<1> typemask);

void RWByteAddressBuffer.XB_TypedStore2(
        in uint<1> byteOffset,
        in uint<2> value,
        in uint<1> typemask);

void RWByteAddressBuffer.XB_TypedStore3(
        in uint<1> byteOffset,
        in uint<3> value,
        in uint<1> typemask);

void RWByteAddressBuffer.XB_TypedStore4(
        in uint<1> byteOffset,
        in uint<4> value,
        in uint<1> typemask);

Execution context

The following intrinsics return the thread context.

uint __XB_GetCUID();
uint __XB_GetLaneID();
uint __XB_GetSEID();
uint __XB_GetSIMDID();
uint __XB_GetWaveID();

Cross lane

A lane is said to be “active on entry” if its lane’s mask bit was enabled on entry to the shader. Sample and gradient operations can require that all lanes in an active lane’s quad are enabled, and the compiler activates these lanes when needed using the s_wqm_b32 instruction.

The compiler reserves the right to enable helper lanes and by default their values will be included by all cross lane operations. If it is desired to exclude helper lanes then the user must write code to test them away. For example, the following expression returns 1 if the current lane was active on entry.

bool fWasActiveOnEntry = __XB_V_CNDMASK_B32(__XB_GetEntryActiveMask64(), uint2(0,1));

uint<2> __XB_Ballot64(in uint condition);

uint<2> __XB_GetEntryActiveMask64();

uint __XB_GetEntryM0();

$type1 __XB_LaneSwizzle(
        in numeric32_only<> value,
        in uint<> offset10);

Char * pOffset = &offset10;

if (offset[15]) {
  for (i = 0; i < 32; i+=4) {
    thread_out[i+0] = thread_in[i+pOffset[1:0] ];
    thread_out[i+1] = thread_in[i+pOffset[3:2] ];
    thread_out[i+2] = thread_in[i+pOffset[5:4] ];
    thread_out[i+3] = thread_in[i+pOffset[7:6] ];
  }
}
else {
  for (i = 0; i < 32; i++) {
    j = ((i & pOffset[4:0]) | pOffset[9:5]) ^ 
          pOffset[14:10];
    thread_out[i] = thread_in[j];
  }
}

type __XB_MakeUniform(type)

uint<1> __XB_MBCNT64(in uint<2> operandToMask);

$type1 __XB_ReadLane(
        in any<> value,
        in int lane);

uint<1> __XB_V_CNDMASK_B32(in uint<2> m, in uint<2> r);

((__XB_ShrU64(m, __XB_GetLaneId())) & 1) ? r.y : r.x

$type1 __XB_WriteLane(
        in numeric32_only value, 
        in int lane,
        in $type1 val);

dst = (current_lane == lane) ? new_value : old_value;

Wave intrinsics

These wave intrinsics perform operations on the input value from all live threads in a wave.

These intrinsics will include helper lanes in their operations. If it is desired to exclude helper lanes then they should be manually excluded by ensuring they are in the “active on entry” mask.

float<> __XB_WaveAdd_F32(in float<> x);

uint<> __XB_WaveAND(in uint<> x);

float<> __XB_WaveMax_F32(in float<> x);

int<> __XB_WaveMax_I32(in int<> x);

uint<> __XB_WaveMax_U32(in uint<> x);

float<> __XB_WaveMin_F32(in float<> x);

int<> __XB_WaveMin_I32(in int<> x);

uint<> __XB_WaveMin_U32(in uint<> x);

uint<> __XB_WaveOR(in uint<> x);

Intrinsics for manual interpolation

The following shader function can be used to retrieve the three raw color interpolands for a triangle, and there are six intrinsic functions that can be used to retrieve the different kinds of barycentric coordinates for the current pixel. This enables a shader to operate on custom packed interpolants, which can be used to save space in the parameter buffer.

interptype __XB_GetRawInterpoland(
        in numeric value, 
        in uint channel)

The following intrinsics get the barymetric coordinates of the current pixel being processed by the pixel shader, in a call such as:

barycentric.xy = __XB_GetBarycentricCoords_Linear_Center();  

float2 __XB_GetBarycentricCoords_Linear_Center()

float2 __XB_GetBarycentricCoords_Linear_Centroid()

float2 __XB_GetBarycentricCoords_Linear_Sample()

float2 __XB_GetBarycentricCoords_Noperspective_Center()

float2 __XB_GetBarycentricCoords_Noperspective_Centroid()

float2 __XB_GetBarycentricCoords_Noperspective_Sample()

When shading a triangle, for example, the color of any individual pixel depends on the colors specified for the three points of the triangle. Depending on the location of the pixel the color will be a blend of the three specified colors. In the usual implementation of DirectX, the interpolation to come up with the pixel color is done in hardware, and the developer does not have access to the raw values. In the Xbox One GPU process however, the interpolation is computed by the pixel shader, and the raw values are available in the pixel shader for the developer to use if required. The intrinsics listed above provide access to the raw values so a developer could write their own computation.

There are two kinds of raw value used for interpolation:

1. The barycentric coordinate, locating the position in the triangle.
2. The raw interpolants (the colors specified for the tips of the triangle).

For more information, refer to Interpolation Modifiers.

The following shader code shows an example of unpacking a packed interpolant using the intrinsics:

float4 Interpolate( float4 A, float4 B, float4 C, float3 barycentric )
{
   return A * barycentric.z + B * barycentric.x + C * barycentric.y;
}

struct Interpolants_Packed
{
   float4 position     : SV_POSITION0;
   float color_packed  : COLOR0;
};

float ByteToFloat( uint a )
{
   return a / 255.f;
}

float4 UnpackColor( uint packed )
{
   return float4( ByteToFloat( ( packed >>  0 ) & 0xff ),
                  ByteToFloat( ( packed >>  8 ) & 0xff ), 
                  ByteToFloat( ( packed >> 16 ) & 0xff ),
                  ByteToFloat( ( packed >> 24 ) & 0xff ) );
}

Pixel PSPackedInterpolants( Interpolants_Packed In )
{
   float3 barycentric;
   barycentric.xy = __XB_GetBarycentricCoords_Linear_Center();
   barycentric.z = 1 - barycentric.x - barycentric.y;

   uint rawA = asuint( __XB_GetRawInterpoland( In.color_packed, 0 ) );
   uint rawB = asuint( __XB_GetRawInterpoland( In.color_packed, 1 ) );
   uint rawC = asuint( __XB_GetRawInterpoland( In.color_packed, 2 ) );
   float4 decompressedA = UnpackColor( rawA );
   float4 decompressedB = UnpackColor( rawB );
   float4 decompressedC = UnpackColor( rawC );

   Pixel Out;
   Out.color = Interpolate( decompressedA, decompressedB, decompressedC, barycentric );

   return Out;
}  

GDS/GWS intrinsics

uint __XB_GdsOrderedCount(
        in uint vsrc0, 
        in uint flags);

uint __XB_GDS_Read_U32(
        in uint addr);

void __XB_GDS_Write_U32(
        in uint addr,
        in uint value);

The following intrinsics all map to CI GDS instructions:

uint      __XB_GDS_Add_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_Add_U32 (in uint addr, in uint value);
uint      __XB_GDS_And_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_And_U32 (in uint addr, in uint value);
void      __XB_GDS_Cmpst_U32 (in uint addr, in uint cmpValue, in uint storeValue);
uint      __XB_GDS_Dec_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_Dec_U32 (in uint addr, in uint value);
uint      __XB_GDS_Inc_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_Inc_U32 (in uint addr, in uint value);
void      __XB_GDS_Max_I32 (in uint addr, in uint value);
uint      __XB_GDS_Max_Rtn_I32 (in uint addr, in uint value);
uint      __XB_GDS_Max_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_Max_U32 (in uint addr, in uint value);
void      __XB_GDS_Min_I32 (in uint addr, in uint value);
uint      __XB_GDS_Min_Rtn_I32 (in uint addr, in uint value);
uint      __XB_GDS_Min_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_Min_U32 (in uint addr, in uint value);
uint      __XB_GDS_Mskor_Rtn_U32 (in uint addr, in uint mask, in uint orValue);
void      __XB_GDS_Mskor_U32 (in uint addr, in uint mask, in uint orValue);
uint      __XB_GDS_Or_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_Or_U32 (in uint addr, in uint value);
uint      __XB_GDS_Rsub_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_Rsub_U32 (in uint addr, in uint value);
uint      __XB_GDS_Sub_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_Sub_U32 (in uint addr, in uint value);
uint      __XB_GDS_Wrxchg_Rtn_U32 (in uint addr, in uint value);
uint      __XB_GDS_Xor_Rtn_U32 (in uint addr, in uint value);
void      __XB_GDS_Xor_U32 (in uint addr, in uint value);

The following intrinsics map to CI Gws instructions:

uint     __XB_GwsBarrier(in uint vsrc0, in uint offset0);
uint     __XB_GwsInit(in uint vsrc0, in uint offset0);
uint     __XB_GwsSemaBr(in uint vsrc0, in uint offset0);
uint     __XB_GwsSemaP(in uint offset0);
uint     __XB_GwsSemaReleaseAll(in uint offset0);
uint     __XB_GwsSemaV(in uint offset0);

Special

uint __XB_GetShaderUserData(in uint N)

uint<2> __XB_MemTime()

uint __XB_S_SLEEP(in uint period);

Alphabetical list of intrinsics

• __XB_AddI64
• __XB_Ballot64
• __XB_BFI
• __XB_BFM
• __XB_Cos_F32
• __XB_Cube_ID
• __XB_Cube_MA
• __XB_Cube_SC
• __XB_Cube_TC
• __XB_DivI64
• __XB_DivU64
• __XB_DToI64
• __XB_DToU64
• __XB_F32ToI32FLR
• __XB_F32ToI32RPI
• __XB_FMA_F32
• __XB_GDS_Add_Rtn_U32
• __XB_GDS_Add_U32
• __XB_GDS_And_Rtn_U32
• __XB_GDS_And_U32
• __XB_GDS_Cmpst_U32
• __XB_GDS_Dec_Rtn_U32
• __XB_GDS_Dec_U32
• __XB_GDS_Inc_Rtn_U32
• __XB_GDS_Inc_U32
• __XB_GDS_Max_I32
• __XB_GDS_Max_Rtn_I32
• __XB_GDS_Max_Rtn_U32
• __XB_GDS_Max_U32
• __XB_GDS_Min_I32
• __XB_GDS_Min_Rtn_I32
• __XB_GDS_Min_Rtn_U32
• __XB_GDS_Min_U32
• __XB_GDS_Mskor_Rtn_U32
• __XB_GDS_Mskor_U32
• __XB_GDS_Or_Rtn_U32
• __XB_GDS_Or_U32
• __XB_GDS_Read_U32
• __XB_GDS_Rsub_Rtn_U32
• __XB_GDS_Rsub_U32
• __XB_GDS_Sub_Rtn_U32
• __XB_GDS_Sub_U32
• __XB_GDS_Write_U32
• __XB_GDS_Wrxchg_Rtn_U32
• __XB_GDS_Xor_Rtn_U32
• __XB_GDS_Xor_U32
• __XB_GdsOrderedCount
• __XB_GetBarycentricCoords_Linear_Center
• __XB_GetBarycentricCoords_Linear_Centroid
• __XB_GetBarycentricCoords_Linear_Sample
• __XB_GetBarycentricCoords_Noperspective_Center
• __XB_GetBarycentricCoords_Noperspective_Centroid
• __XB_GetBarycentricCoords_Noperspective_Sample
• __XB_GetCUID
• __XB_GetEntryActiveMask64
• __XB_GetEntryM0
• __XB_GetLaneID
• __XB_GetRawInterpoland
• __XB_GetSEID
• __XB_GetShaderUserData
• __XB_GetSIMDID
• __XB_GetWaveID
• __XB_GwsBarrier
• __XB_GwsInit
• __XB_GwsSemaBr
• __XB_GwsSemaP
• __XB_GwsSemaReleaseAll
• __XB_GwsSemaV
• __XB_I4ToF32
• __XB_I64ToD
• __XB_IBFE
• __XB_LaneSwizzle
• __XB_Log_Clamp
• __XB_MadI24
• __XB_MadU24
• __XB_MakeUniform
• __XB_Max3_F32
• __XB_Max3_I32
• __XB_Max3_U32
• __XB_MaxI64
• __XB_MaxU64
• __XB_MBCNT64
• __XB_Med3_F32
• __XB_Med3_I32
• __XB_Med3_U32
• __XB_MemTime
• __XB_Min3_F32
• __XB_Min3_I32
• __XB_Min3_U32
• __XB_MinI64
• __XB_MinU64
• __XB_ModI64
• __XB_ModU64
• __XB_MulI24
• __XB_MulI24Hi
• __XB_MulI64
• __XB_MulU24
• __XB_MulU24Hi
• __XB_MulU64
• __XB_NegI64
• __XB_PackF32ToSNORM16
• __XB_PackF32ToU8
• __XB_PackF32ToUNORM16
• __XB_PackI32ToI16
• __XB_PackU32ToU16
• __XB_Rcp_Clamp
• __XB_ReadLane
• __XB_Rsq_Clamp
• __XB_S_BCNT0_U32
• __XB_S_BCNT0_U64
• __XB_S_BCNT1_U32
• __XB_S_BCNT1_U64
• __XB_S_BREV_U32
• __XB_S_BREV_U64
• __XB_S_BSET0_U32
• __XB_S_BSET1_U32
• __XB_S_BSET1_U64
• __XB_S_FF0_U32
• __XB_S_FF0_U64
• __XB_S_FF1_U32
• __XB_S_FF1_U64
• __XB_S_FFO_U32
• __XB_S_FFO_U64
• __XB_S_FOSB_U32
• __XB_S_FOSB_U64
• __XB_S_SLEEP
• __XB_ShlU64
• __XB_ShrI64
• __XB_ShrU64
• __XB_Sin_F32
• __XB_SubI64
• __XB_U64ToD
• __XB_UBFE
• __XB_UnpackByte0
• __XB_UnpackByte1
• __XB_UnpackByte2
• __XB_UnpackByte3
• __XB_V_CNDMASK_B32
• __XB_WaveAdd_F32
• __XB_WaveAND
• __XB_WaveMax_F32
• __XB_WaveMax_I32
• __XB_WaveMax_U32
• __XB_WaveMin_F32
• __XB_WaveMin_I32
• __XB_WaveMin_U32
• __XB_WaveOR
• __XB_WriteLane
• __XBOX_PackF32ToI16
• __XBOX_PackF32ToU16
• Buffer.XB_TypedLoad
• ByteAddressBuffer.XB_TypedLoad
• ByteAddressBuffer.XB_TypedLoad2
• ByteAddressBuffer.XB_TypedLoad3
• ByteAddressBuffer.XB_TypedLoad4
• f32tof16nearest
• RWBuffer.XB_TypedLoad
• RWByteAddressBuffer.XB_TypedLoad
• RWByteAddressBuffer.XB_TypedLoad2
• RWByteAddressBuffer.XB_TypedLoad3
• RWByteAddressBuffer.XB_TypedLoad4
• RWByteAddressBuffer.XB_TypedStore
• RWByteAddressBuffer.XB_TypedStore2
• RWByteAddressBuffer.XB_TypedStore3
• RWByteAddressBuffer.XB_TypedStore4

See also

Shaders and the FXC Shader Compiler

D3DCOMPILE Constants

GPU and Shader Acronyms